When information is recorded on an optical disk such as a DVD (Digital Versatile Disk) or the like, a synchronization signal (SYN), which is a predetermined specific bit pattern, is written to the optical disk together with data at a fixed period in accordance with a recording format in order that the data may be read out. FIG. 5 illustrates an example of the format of a sector on an optical disk such as a DVD. In the example shown in FIG. 5, there are 13 rows, which are obtained by adding one row of an external parity code to a 182-byte, 12-row sector, where the 182 bytes are obtained by adding a 10-byte internal parity code to 172 bytes per row. A synchronization signal (32 channel bits in the example shown in FIG. 5) is inserted every 91 bytes. Data is 8/16-modulated and recorded and consists of 1456 channel bits. In FIG. 5, therefore, one sync frame comprises 32+1456=1488 channel bits (Cb). An overview of detection of synchronization in the reproducing system of an optical disk will be described below. For a description of a synchronization signal detecting circuit, refer to the specification of Japanese Patent Kokai Publication No. JP-P2000-3550A (pages 3, 5 and FIGS. 1, 6) (Patent Document 1).
FIG. 6 illustrates the structure of the reproducing system of an ordinary optical disk (see Patent Document 1). As shown in FIG. 6, information that has been recorded on an optical disk 120 is read by an optical pickup 121 and input to an RF amplifier 122. The signal (RF signal) that is output from the RF amplifier 122 is subjected to waveform equalization by a filter 123. The waveform-equalized signal is input to and converted to a binary data by a data binarizing circuit 124. The binary signal is input to a PLL (Phase-Locked Loop) circuit 125, which generates a channel clock signal synchronized to a channel bit. Serial data and the channel clock signal from the PLL circuit 125 are input to a synchronization signal detecting circuit 126, which detects synchronization. The output of the synchronization signal detecting circuit 126 is demodulated by a demodulating circuit 127.
The synchronization signal detecting circuit 126 detects the synchronization signal contained in the recorded signal and makes it possible for the recorded data signal to be reproduced in the correct format. The synchronization signal detecting circuit 126 detects synchronization by performing pattern matching to determine whether the synchronization signal matches the channel bit stream read out of the optical disk 120.
When read-out is started in the playback system shown in FIG. 6, the synchronization signal detecting circuit 126 performs pattern matching sequentially with respect to the channel bit stream until the synchronization signal can be detected. In order to suppress the probability that erroneous detection of the synchronization signal will occur owing to channel-bit error at read-out once the synchronization signal has been detected, the synchronization signal detecting circuit 126 subsequently performs pattern matching with the synchronization signal in accordance with the recording format only in the vicinity of a position at which a succeeding synchronization signal is expected to be detected in the entered channel bit stream.
There are instances where, owing to noise or the like, a bit pattern identical with the synchronization signal happens to exist in the data part of the channel bit stream that has been read out. Consequently, in order to avoid a situation in which the synchronization signal detecting circuit 126 erroneously detects such a false pattern as the synchronization pattern, detection of synchronization is carried out only over a period of time that includes a fixed length of time before and after the timing at which the synchronization pattern appears. This period of time in which matching with the synchronization signal is performed is referred to as a “window”.
As is well known, synchronization-signal detection error in the synchronization signal detecting circuit 126 can be ascribed to any of the following:                burst error due to flaws on the optical disk;        random error due to random defects on the irradiating surface of the light source; and        failure to detect the synchronization signal owing to disturbance of the synchronization period ascribable to external disturbances.        
In the event that the synchronization signal cannot be detected temporarily, a technique commonly used is to create a window of adjusted size at a fixed period using the synchronization signal found last as the reference.
A synchronization signal detector of the kind shown in FIG. 7 is disclosed in Patent Document 1 as means capable of re-detecting a synchronization signal in the event of burst error or random error. As shown in FIG. 7, this conventional synchronization signal detector is such that a count value that is output from a forward protection counter 105 is decoded by a decoder 106, the decoded value is supplied to a window signal generating circuit 107 and the latter widens a pulse S106 from a timing generator 108 based upon the decoded value. By virtue of this arrangement, the window pulse width is changed in a case where the synchronization pattern cannot be detected owing to a burst defect ascribable to flaws or the like. In a case where detection of synchronization is not possible owing to random defects, control that will not change the window pulse width is performed. In Patent Document 1, components besides the decoder 106 are dealt with as prior art. These will be described in brief in order to facilitate an understanding of the operating principle of the synchronization signal detecting circuit.
A window control circuit 101 in FIG. 7 comprises an AND gate for controlling passage of serial data (a recording signal that has been read out) to a synchronization detecting circuit 102. If a synchronization signal (synchronization pattern) has been detected by the synchronization detecting circuit 102, then the latter generates a synchronization pattern detection pulse S101. A frame counter 103 counts a channel clock that is reproduced from an optical disk and generates a synchronization pattern prediction pulse S102 at a position at which synchronization is expected to be detected next, this being derived from the position at which synchronization was detected previously. It should be noted that the frame counter 103 is reset by the OR (the output of an OR gate 112) between the synchronization pattern detection pulse S101 and the synchronization pattern prediction pulse S102. A frame clock generating circuit 109 generates a frame clock using the synchronization pattern detection pulse S101 and the synchronization pattern prediction pulse S102.
A backward protection counter 104 counts up when the synchronization pattern detection pulse S101 and synchronization pattern prediction pulse S102 are output simultaneously and outputs a signal S103 (overflow), which indicates establishment of synchronization, when it counts up to a set value for backward protection.
The forward protection counter 105 receives the output signal S103 of the backward protection counter 104 as an enable signal EN, and receives and counts up the output of an Ex-OR (exclusive-OR) gate 111 the inputs to which are the synchronization pattern detection pulse S101 and synchronization pattern prediction pulse S102. When the forward protection counter 105 counts up to a set value for forward protection in a state in which synchronization has been established, the forward protection counter 105 construes loss of synchronization and outputs a signal S104, thereby resetting the backward protection counter 104. It should be noted that the forward protection counter 105 is reset by the synchronization pattern detection pulse S101. The pulse signal S104 indicative of loss of synchronization from the forward protection counter 105 and a window pulse S107 from the window signal generating circuit 107 enter an OR gate 113, which takes the OR between these two signals and delivers its output to the window control circuit 101.
If the set number for forward protection is “4”, then the decoded value is “0” when the output of the forward protection counter 105 is “0”, and the decoded values are ±α, ±2α and ±3α when the outputs of the forward protection counter 105 are “1”, “2” and “3”, respectively, where α is the minimum-unit value for widening the width of the window pulse on both sides thereof.
An arrangement in which dual windows (detection windows) are used to deal with disturbance of the synchronization period caused by external disturbance is known [see the specification of Japanese Patent Kokai Publication No. JP-A-10-199162 (Patent Document 2)]. According to Patent Document 2, first and second detection window creating circuits are provided and use is made of first and second detection windows and of a coincidence signal (a pulse that is output when coincidence is detected by a pattern comparing circuit that compares an input signal and a reference synchronization pattern). Whenever the period of the coincidence signal fluctuates, the detection windows are created alternatingly in conformity with the synchronization period of the coincidence pulse. In this conventional arrangement, the first and second detection window creating circuits set a detection window width of ±N clocks before and after the synchronization period during normal operation. When an external disturbance signal or the like is input, the detection window width is enlarged from ±N clocks to ±M clocks (M>N).
[Patent Document 1]
Japanese Patent Kokai Publication No. JP-P2000-3550A (pages 3 and 5, FIGS. 1 and 6)[Patent Document 2]
Japanese Patent Kokai Publication No. JP-A-10-199162 (pages 3-4, FIG. 1)
In order to gain an understanding of the problems to be solved by the present invention, the results of analysis and studies by the Inventors will be described in detail.
Assume a case where recording is performed to follow already existing data (recorded data) on a writable optical disk (inclusive of a write-once optical disk). From the newly recorded leading synchronization signal onward, the period of the synchronization signal successively recorded at the position corresponding to the synchronization period is a period the same as that of the synchronization signal present in the region in which recording has already been performed. However, there are cases where the synchronization signal present in the area in which recording has already been performed is not adopted as the reference.
On the other hand, assume a case where recording (e.g., write-once, etc.) is performed to follow already existing data on a writable optical disk. In order to maintain the interval between synchronization signals even in an area where recording is performed anew, it is necessary to perform recording with the same phase and same period using the synchronization signal present in the already recorded area as the reference. However, even if the period of the synchronization signal present in the already recorded area and the period of the synchronization signal in the newly recorded area are the same, there are instances where the phase will shift from the position of the leading synchronization signal recorded anew.
The following are considered to be the causes of this shift in recording:                start of recording from an incorrect position; and        the position at which recording starts is correct but data that was written previously was recorded at the wrong position.        
If the shift in recording becomes large, regardless of whichever of the above is the cause, detection of the synchronization signal becomes temporarily impossible and this results in burst error. If there is a shift in recording, there will be instances where the position of the synchronization signal departs significantly from the window.
In accordance with the results of studies by the Inventors, the following problems have been clarified in the conventional technique of attempting to detect the synchronization signal by creating a window at a fixed period in accordance with the format of the optical disk using the synchronization signal found last as the reference:
(A) Assume that the position of the synchronization signal has deviated far from the window. If the position of the synchronization signal departs from the position of the window when an attempt is made to detect the synchronization signal by enlarging the window, the width of the window (the length of time over which pattern matching is carried out) is enlarged correspondingly. As a result, there is a greater probability that the synchronization signal will be detected erroneously. Patent Document 2 is such that if the position of the synchronization signal deviates from the window by more than a prescribed amount, interpolation of the synchronization signal is performed using a reference synchronization pattern. However, there is absolutely no description concerning a method of generating a synchronization signal that deals with a shift in recording.
(B) A case where it is attempted to detect synchronization by performing pattern matching sequentially with respect to an input channel bit stream (serial data from the PLL circuit of FIG. 6) in a manner similar to that when reading of the disk starts and a case where a synchronization signal cannot be detected temporarily owing to burst error or the like cannot be distinguished from each other. It is necessary to attempt to detect synchronization by creating a window over a fixed period of time using the synchronization signal detected last as the reference. Consequently, it takes time to detect a synchronization signal that has deviated owing to a recording shift.